Attala Systems is data center infrastructure solutions company founded in 2015. We are headquartered in the heart of Silicon Valley in San Jose, California. We create storage, networking and compute infrastructure and solutions for cloud and enterprise data centers. We have created a world-class team and are looking to add to our ranks with the following positions.
We are looking for talented and enthusiastic engineers to join our management software team which develops the orchestration, provisioning and analytics required for Attala's storage and networking infrastructure products.
- Design and development of REST APIs
- Work on standards-based API and hierarchy such as DMTF/SNIA Redfish and Swordfish
- End-to-end debugging between UI, management software and embedded devices
- Scripting of builds and release-packages
- Test scripts for development and test automation
- Bachelors or Masters degree in Computer Science, Software Engineering or related courses with a background in UI design and development.
- At least 2 years experience in management software development, with active contributions in the area of REST API design and development.
- Experience in 'Go' or Java required. Python is a plus.
- Must know basics of networks and network-security protocols
- Hands-on work with REST API documenting tools such as 'Swagger' would be nice.
- Basics of Data Science
- Familiarity with any flavor of Linux
FPGA Design Engineers
Participate in the Architectural discussions. Understand the architecture and micro architecture by studying specifications and direct interaction with architects. Design RTL modules, debug and synthesize for timing closure. Work with verification team to define test suits and debug the issues. Work with the system/software team to bring up FPGA in the lab and debug any failures/problems. Work with customers in resolving the field issues.
3-8 years experience in RTL Design and Verification. Networking background preferred but not essential. FPGA synthesis and compile background a strong consideration.
BS or MS in Electrical or Computer Engineering.
Experience in design & verification languages such as Verilog and System Verilog is required.
Experience in chip/system level debug needed
Must have gone through at least two chip/fpga product design cycles.
Experience with Cadence, Synopsys or Mentor design and verification tools is required.
Prior programming experience with one or two scripting languages such as Python, Perl, TCL, etc is desired. Must be self-motivated, effective team player able to thrive in a fast-paced engineering environment. Strong analytical and problem solving skills and good verbal and written communication skills.
FPGA Verification Interns
We are looking for multiple talented and energetic candidates for FPGA verification internships. The internships will start in the first week of June 2018.
Understand the architecture and micro architecture by studying specifications and direct interaction with architects and logic designers. Participate in the device level simulations and system level tests using FPGAs. Participate in the debug in the lab in full system validation. Write the tests outlined by test plan for both Simulations and FPGA. Enhance test benches and tests to achieve coverage goals.
BS or MS in Electrical or Computer Engineering. Position requires coursework, project work or experience in design & verification languages such as VHDL, Verilog and System Verilog. Prior programming experience with one or two scripting languages such as Python, Perl, TCL, etc is required. Project work or experience with Cadence, Synopsys or Mentor design and verification tools. Must be self-motivated, effective team player able to thrive in a fast-paced engineering environment. Strong analytical and problem solving skills and good verbal and written communication skills.